Abstract: Commodity silicon technology including microprocessor
performance and memory density has improved tremendously in the last few
years. Commodity networking, especially fast ethernet at 100~Mbs has made
it possible to design distributed memory systems with tolerable bandwidths
and latencies.
Free operating systems, especially Linux and FreeBSD are available, reliable
and well-supported, and are distributed with complete source code, encouraging
the development of additional tools including low-level drivers, parallel
file systems, communication libraries, etc.
Industry standard parallel programming environments, e.g., MPI, PVM, BSP,
are commonplace across the spectrum of high-end supercomputers, and are
also available for, and well-suited to, Beowulf-class systems.
It is possible to assemble a system, scalable up to 256 processors using
Pentium Pro processors, each with 128MB of memory and 3GB of secondary
storage and capable of 200Mflops (peak) for under $2000 per processor. Approximately
25% of this cost is devoted to the network. The processors are connected
by fast (100~Mbs) ethernet and a switch fabric that includes a gigabit
ethernet backplane and 100~Mbs links to individual processors.
We will report on a number of science and engineering applications that
have be en ported from other message-passing parallel architectures, and
compare the performance, and price/performance ratio with other available
systems. In addition, low-level bandwidth and latency benchmarks of the
scalable network configuration will be reported.
Dr. Thomas Sterling is currently on a joint research appointment
at the California Institute of Technology and the NASA Jet Propulsion Laboratory.
Dr. Sterling has been engaged in research related to parallel computer
architecture, system software, and evaluation for more than a decade. He
was a key contributor to the design, implementation, and testing of several
experimental parallel architectures. The focus of Dr. Sterling's research
has been on the modeling and evaluation of performance factors determining
scalability of high performance computing systems. Upon completion of his
Ph.D. as a Hertz Fellow from MIT in 1984, Dr. Sterling served as a research
scientist at Harris Corporation's Advanced Technology Department, and later
with the systems group of the IDA Supercomputing Research Center. In 1992,
Dr. Sterling joined the USRA Center for Excellence in Space Data and Information
Sciences to support the NASA HPCC earth and space sciences project at the
Goddard Space Flight Center. Dr. Sterling is an Adjunct Associate Professor
at the University of Maryland College Park, where he lectures on computer
architecture. He holds six patents, is the co-author of two books and has
published dozens of papers in the field of parallel computing.
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